1. Field of the Invention
This invention relates generally to cache managers and in particular to a cache manager for storage devices such as CD-ROM drives, DVD drives, and hard drives.
2. Description of the Related Art
Advances in semiconductor manufacturing and microprocessor design have combined to create microprocessors with enormous processing power running at very high frequencies. However, the benefits of fast microprocessors are lost in a computer system if the computer system is unable to retrieve data at a very high rate for the microprocessor. Many techniques to improve the rate of data transfer between the microprocessor and main memory have been developed. However, the data transfer rate from storage devices, such as CD-ROM drives, DVD drives, hard drives, and tape drives, to main memory or directly to the microprocessor still presents a bottleneck to the overall performance of a computer system.
Many computer applications process large quantities of data. For example, a multimedia application may process both video and audio data. To produce high resolution graphics and high quality sound a vast amount of audio data and video data must be available for the multimedia application. The data is typically stored on CD-ROM since CD-ROMs are inexpensive to manufacture and hold a large quantity of data. However, other storage devices such as magnetic fixed disks and magneto-optical disks are also used. Since the data must be retrieved from the storage device for the application program, the data transfer rate between the storage device and the processor may dictate the speed of the entire computer system. Therefore, the storage device should be able to transfer data to the computer system very rapidly.
FIG. 1 shows a block diagram of a typical storage device 100 coupled to a host computer system 190 through a peripheral bus 160. A storage media 110, for example a CD-ROM, a DVD, a magnetic disk, or a magnetic tape, is driven by a motor 114 under the control of a motor/servo controller 118. Data on storage media 110 are stored in storage media data blocks. The specific format of a storage media data block is standardized for different devices. FIG. 3(b) illustrates a storage media block of a CD-ROM and FIG. 3(c) illustrates a storage media block for a DVD disk. A signal detector/writer 122 (FIG. 1), for example an optical head or a magnetic head, reads and writes data from storage media 110. Feedback signals read by or generated by signal detector/writer 122 may be sent to motor/servo controller 118 for synchronization.
On read transfers, the signal read by signal detector/writer 122 is amplified by an amplifier 126. In some embodiments of storage device 100, synchronization data are amplified before the synchronization data is sent to motor/servo controller 118. The amplified signal is then sent to a digital signal processor (DSP) 130, which may also provide control signals to motor/servo controller 118. DSP 130 processes the amplified data for use by host computer system 190. Some embodiments of storage device 100 include a digital to analog converter 135 to provide data from storage media 110 to analog devices. For example, a CD-ROM drive typically provides audio data in analog form. The processed data is sent to a device controller 140. In some storage devices a secondary data channel may also be stored on storage media 110. For example, a CD-ROM contains a secondary data channel called the subcode data channel. On write transfers, DSP 130 generates a data signal for signal detector/writer 122 based on the data received from host computer system 190.
Device controller 140 typically uses a memory buffer 150 as a cache for the processed data or the incoming data. Device controller 140 also provides the interface for storage device 100 to peripheral bus 160. Peripheral bus 160 could be, for example, an IDE bus using ATAPI protocols, a SCSI bus or an IEEE 1394-1995 bus. Since peripheral bus 160 communicates with many different types of storage devices, transfers on peripheral bus 160 are typically based on the number of data words to transfer rather than the number of storage media blocks. Peripheral bus 160 couples storage device 100 to host computer system 190. Storage Device 100 also contains a microcontroller 170, which could be a microprocessor, to control the other components of storage device 100.
Microcontroller 170 may use a portion of memory buffer 150 for system information. Microcontroller 170 executes firmware instructions, i.e. computer code stored in microcontroller 170, a ROM (not shown) or a flash memory device (not shown), to interface with host computer system 190 in conjunction with device controller 140 through peripheral bus 160. To reduce the cost of storage device 100, microcontroller 170 is typically a much less powerful device than the microprocessor of host computer system 190. Therefore, microcontroller 170 executes instructions much slower than the microprocessor of host computer system 190.
In a typical read transaction host computer system 190 sends a request for data through peripheral bus 160. Microcontroller 170 with device controller 140 interprets the request and retrieves the requested data from storage media 110 into memory buffer 150. When memory buffer 150 contains a sufficient amount of data, device controller 140 and microcontroller 170 sends the stored data from memory buffer 150 to host computer system 190 through peripheral bus 160. The specific amount of data stored in memory buffer 150 before transfer to host computer system 190 depends on the specific type of storage device and the specific request made by host computer system 190.
In a typical write transaction, host computer system 190 sends a write request through peripheral bus 160. Microcontroller 170 with device controller 140 interprets the request and receives the incoming data from host computer system 190 into memory buffer 150. When memory buffer 150 contains a sufficient amount of data, device controller 140 and microcontroller 170 sends the stored data from memory buffer 150 to storage media 110.
Interfacing with peripheral bus 160 is typically very complex. Therefore, the task of interfacing with peripheral bus 160 is divided between microcontroller 170 and device controller 140. In conventional storage devices, microcontroller 170 handles the bulk of the control portion of the interface and device controller 140 primarily handles the data transfer. However, since microcontroller 170 is a slow device, substantial delays are introduced by over reliance on microcontroller 170. Hence, there is a need for a method or apparatus to interface efficiently with peripheral bus 160 without the need for excessive assistance of microcontroller 170.